FPGA / ASIC Verification Engineers
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FPGA / ASIC Verification Engineers

P. Chappel Associates

Location: New York,NY, USA

Date: 2024-05-17T06:54:32Z

Job Description:

Our client is a dynamic growing company who have developed a revolutionary new computer architecture that is massively parallel, provides unprecedented scalability and will open a new frontier in software development. Several systems have been installed and we are searching for a few key players to join the team in the development of a cutting-edge new product. New architecture will target data analysis, cyber security, machine learning/AI, training, etc.. Qualified candidates will be talented team players who want to play a key role in this ever changing environment. Experience with FPGA, ASIC, HDL and System Verilog is required. Small and/or startup company experience is greatly desired as is full product development lifecycle. HPC experience would be a plus.Competitive base salary ($100-125K for junior; $180-220K for senior/principal) plus generous stock options.We are also recruiting for FPGA/ASIC Design Engineers and Software Engineers for the same great company.ASIC/FPGA VerificationEngineers 2 open positions: one senior to principal level which is remote and 1 junior to intermediate level will have a hybrid work model in New York .ASIC VerificationEngineers will verifyand implement IP used in FPGA or ASIC for this revolutionary new computer architecture. This is an outstanding opportunity for engineersto work in a dynamic environment with renowned experts.At present Intel FPGAs are being used.Duties include: test designs using Verilog / System Verilog; measurement of test coverage; work with directed random and formal verification approaches.Qualifications include:BSEE or MSEE, 2-5 years of relevantexperience for junior to mid-level; more experience required for senior/principal level engineerVerilog or other HDL backgroundExperience writing test benches, TCL or other scripting language experienceProgramming in C or similar languagesUnderstanding ofcomputer architectureTrack record of getting things done and solving problemsExperience working in a small, dynamic environment.I'm interested! Your Name (required)Your Email (required)SubjectYour MessageAttach Resume (5mb max size. Files accepted: .pdf, .doc, .docx, .txt, .otf, .html) #J-18808-Ljbffr

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